Course Information

Sample Chapter

Sample Exam

Powerpoint Presentations

  • Chapter 1- Digital System Design, Introduction 
    1. Lecture 1
    2. Assignment No.1
  • Chapter 2- Using hardware Description Language Verilog HDL & System Verilog 
    1. Lecture 2
    2. Lab 1
    3. Lab 2
  • Chapter 3- System Design Flow and Fixed-point Arithmetic 
  • Chapter 4 - Fully Dedicated Architectures 
  • Chapter 5 -  Design Options for Basic Building Blocks 
  • Chapter 6 -  Multiplier-less Multiplication by Constants 
  • Chapter 7 -  Pipelining & Retiming 
  • Chapter 8 -  Unfolding & Folding Transformations 
  • Chapter 9 -  Time Shared Architecture 
  • Chapter 10 -  Micro-programmable State Machine Design 
  • Chapter 11 -  Micro-Programmed Adaptive Filtering Applications  
  • Chapter 12 -  CORDIC-based DDFS Architecture 
  • Chapter 13 -  Digital Design of Communication Systems 

Assignments

Miscellaneous

Errata